New energy-efficient interconnect technologies for microchips
Modern computing infrastructures in data centers or distributed computing systems contribute significantly to global electricity use. The increasing demand for electricity in these systems poses problems, as the need for electricity could potentially exceed the world's energy production in the near future.
To combat this problem, the National Science Foundation has awarded Future of Semiconductor grants totaling $42.4 million to further research on semiconductors. Part of this effort will be led by Dr. Yuxuan 'Cosmi' Lin, assistant professor in the Department of Materials Science and Engineering at Texas A&M University. His team has received $1.8 million to support a collaborative research project on new designs of interconnect technologies to reduce their power consumption and boost the overall performance of microchips.
Microchips contain interconnects — layers of metal conductors with nanoscale to microscale dimensions that connect different electronic devices in a computer chip. About 20-40% of power in microchips is consumed by its interconnects. Copper is the standard material for interconnects due to its abundance, offering low costs and good electrical conductivity.
However, when its dimensions are reduced below 10 nanometers, its resistivity increases dramatically, increasing power consumption and heat generation.
"First, electrons in ultrathin copper nanowires can no longer move freely due to structure and property changes," said Lin. "Second, the surface of copper nanowires must be encapsulated with an insulating layer to make the structure more stable, but this further reduces charge transport."
Throughout this three-year project, the team will develop a new way to synthesize copper nanowires and design effective encapsulation layers based on two-dimensional materials. These break the paradigm, limiting current interconnect technology and enabling next-generation high-performance and energy-efficient computer chips.
"This project offers potential pathways for integrating these new interconnect technologies with silicon integrated circuit chips, paving the way for upscaling such as an emerging industrial development and manufacturing technology," said Lin.
The proposed research, education, and workforce development efforts will be conducted among five interdisciplinary research groups across three universities, including Texas A&M, University of Texas at Austin, and Purdue University. New research initiatives and semiconductor workforce development activities will be coordinated across the three campuses. This will enhance the technological leadership and broader societal impact of Texas A&M in microelectronics, which is one of the critical technologies of national interest as outlined by the CHIPS & Science Act and the Texas CHIPS Act.
"New domain knowledge will be established at the forefront of the electronic materials area in materials science and engineering throughout this project," said Lin. "Additionally, the project seeks to engage students at all levels, providing training in physics, materials science, and nanoelectronics to prepare students for industry. "
Besides Dr. Lin's group, contributors to the research include the four research groups: Dr. Yuanyue Liu's group and Dr. Jamie Warner's group at UT Austin, as well as Dr. Zhihong Chen's group and Dr. Sumeet Gupta's group at Purdue University.
Funding for this research is administered by the Texas A&M Engineering Experiment Station (TEES), the official research agency for Texas A&M Engineering.
More information:
new.nsf.gov/news/nsf-awards-42 … uture-semiconductors
Provided by Texas A&M University College of Engineering